verilog數(shù)字鐘

1、I武漢理工大學課程設計——基于基于VerilogHDL的簡易電子鐘設計的簡易電子鐘設計摘要Verilog是廣泛應用的硬件描述語言，可以用在硬件設計流程的建模、綜合和模擬等多個階段。隨著硬件設計規(guī)模的不斷擴大，應用硬件描述語言進行描述的CPLD結構，成為設計專用集成電路和其他集成電路的主流。通過應用VerilogHDL對簡易電子鐘的設計，達到對VerilogHDL的理解，同時對CPLD器件進行簡要了解。本文著眼于使用EDA開發(fā)工具實現(xiàn)簡易

2、電子鐘的設計。隨著微電子技術，計算機技術的不斷發(fā)展和完善，EDA技術已日趨成熟逐漸成為現(xiàn)代電子技術的IIIAbstractIswidelyusedVeriloghardwaredeionlanguagecanbeusedinhardwaredesignprocessmodelingsynthesissimulationphases.Withtheconstantexpansionofthehardwaredesignhardwarede

3、ionlanguagetodescribetheapplicationoftheCPLDarchitectureadesignofASICsotherICsmainstream.ThroughtheapplicationofVerilogHDLdesignofsimpleelectronicclocktotheunderstingofVerilogHDLwhileabriefunderstingoftheCPLDdevice.Thisa

4、rticlefocusesontheuseofEDAtoolstoachievethedesignofsimpleelectronicclock.AsmicroelectronictechnologycomputertechnologycontinuestoevolveimproveEDAtechnologyhasmaturedgraduallybecometheheartofmodernelectronictechnology.EDA

5、technologyistothecomputerasatooldesignerinEDAsoftwareplatfmwithcompletehardwaredeionlanguageVerilogHDLdesignfilesautomaticallybyacomputertocompletethelogiccompilersimplificationsegmentationintegrationoptimizationplacemen

6、troutingsimulationupadapterchipfthespecifictargetcompilationmappingprogramminglogictodownloadsoon.EDAtechnologiescircuitdesigngreatlyimprovestheefficiencyoperabilityreducingthelabintensityofthedesigner.EDAtechnologyiswid

7、elyusedinmachineryelectronicscommunicationsaerospacechemicalmineralbiologicalmedicalmilitaryotherfields.OnAlterasFlex10KseriesEPF10K10briefAlteraCpationSoftwareMaxplusⅡBriefintroductionapplicationofVerilogHDLdesignofthee