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1、<p><b>  外文資料</b></p><p>  Data Transfer Techniques</p><p>  The actual transfer of data between the microcomputer and external and external devices is commonly carried out usin

2、g three different techniques:</p><p> ?。?)ling;(2)errupters; (3) emory access; These techniques can be used individually or in combination..</p><p><b>  Polling</b></p><p&

3、gt;  Polling routines are used for programmed input/output purposes.A number of peripheral devices attached to the microcomouter are continuously polled at specified time intervals to determine the device wishes to input

4、 data to the microproccssor. Similarly, for the transfer of data to an output device,the state of its buffer is checked to determine if it is empty and ready to receive the data. A soft program is required to check the s

5、tate of the peripheral devices. Hardware flaga are used to indaca</p><p>  Polled input/output is very simple and common method of data transfer which does not require any additional logic circuitry.The only

6、 requirement is for an efficient program which is executed at very high speed.</p><p>  Interrupted Intput/output</p><p>  The polling procedure is a form of time-sharing whereby the facilities

7、of the computer are shared between a numbers of uses. The computer continually polls each of the terminals, and serves a terminal for a specified period of time before moving on to the next one. This procedure is ineffic

8、ient because system overheads are incurred in polling all the perpheral devices irrespective of the actual need. The time available for the processing of the real-time requirements of process control system in</p>

9、<p>  Some real-time control applications involve the use of critical programs which must not be interrupted during their execution. Some of the interrupted are trivial which others have to be serviced. For exam

10、ple, data input can be delayed which alarms muse be raised immediately.Differernt types of interrupts, maskable and non-maskable,can be used to overcome these difficulties. Software programs are used to enable or disable

11、 a maskable interrupt. Thus,if the maskable interrupt. Thus, if the mask</p><p>  The interrupt used in a microprocessor system might be a fixed interrupt or a vectored interrupt. A fixed interrupt requires

12、relatively simple hardware. The flag is set on the interrupt line to indicate that service is required. If there is only one device attached to interrupt line ,then the control will be transferred to a fixed memory locat

13、ion which provide the program for servicing that device. When a number of of devices are attached to a given interrupt line, each with its own servicing ro</p><p>  Interrupts with multiple lines provide the

14、 addresses of different memory locations to which the program should transfer in response to an interrupt on a particular It would be necessary to use as many lines as the number of interrupts or resort to polling routin

15、es if more than one device is attached to the same interrupts line .</p><p>  A preferred alternative is to use a vectored interrupt whereby the interrupting device is directly identifed .This device identif

16、ication can be used to to look up the starting memory location of the service routine for that device. Some vectored interrupts not only identify the interrupting device,but alse provide the starting memory location of t

17、he service routine to which the program should jump.Thus the address of the memory location, stored in the peripheral controller ,is placed on the data</p><p>  A system with only one device which can interr

18、upt the normal work of the microcomputer is a very simple one and the particular interrupt can be readily serviced. In practice a large number of devices can provide interrupt requests to the microcomputer .Under normal

19、circumstances, it is likely that two or more devices may provide an interrupt request at the same time.It then becomes necessary to decide the priority to be allocated to individual interrupt request .A number of procedu

20、res can be use</p><p>  Priorities can be allocated to peripherals attached to a single interrupt line by using a simple daisy chain procedure. Once interrupt, the microcomputer sends a signal to the first d

21、evice in the daisy If it is the interrupting device ,then it will provide the memory address of its service routine and the signal will not be passed on to the other way round devices in the daisy chain. If, however ,the

22、 first device did not cause the interrupt,then the massage will be passed on to the next device. </p><p>  An alternative to daisy chains is to use priority interrupt circuits which identify and service the

23、device with highest priority. Level 0 means highest priority,followed by level 1, level 2 and so on. These priority interrupt circuits identify up to 8 interrupt level by means of a 3-bit code which can be inspected by t

24、he microprocessor.Since event such as power failure must be identified quickly and alarms must be raised as soon as possible, these sub-systems are attached to higher priority inte</p><p>  Some of the curre

25、ntly available priority interrupt circuits carry out far more than the identification of the highest priority device which requires attention. Then will also provide the address of the memory location to which the contro

26、l should be transferred. If two interrupts occur simultaneously, the device serviced by the microcessor program has the higher priority. </p><p>  Direct Memory Access </p><p>  While interrupte

27、d input/output throughput rate is higher than the throughput applications requiring fast data transfering. Direct memory access (DMA) techniques bypass the central processing unit and substantially increase the data tran

28、sfer rate which can be as high as the memory cycle time allows. The other limiting factor is the speed of the peripheral device. This technique can be used to write data required at high speeds or for transfers between t

29、he memory and the mass storage devices attac</p><p>  Direct memory access operation can take place in different modes. It is possible to suspend the normal operations of the microcomputer completely for the

30、 period of time during which direct memory access, operations are being carried out. In this particular type of direct memory access, the peripheral wishing to carry out high-speed data transfer informs the DMA controlle

31、r by means of an interrupt signal. The controler has to obtain control of the data and address buses before the high-speed data</p><p>  Another mode of direct memory access used in large systems involves th

32、e stealing of cycles during which the microprocessor is carrying out other tasks which do not require access to the memory and the data bus is not being used. Data is trantsferred one byte at a time. The cycle steaking c

33、an be trantsparent to the microcomputer in the sense that the normal operation of the processor are not suspended. This mode of DMA operation requires that CPU and the external device must not attempt to gin ac</p>

34、<p>  The vast majority of the availzble microprocessor have DMA facilities and suitable LST-based DMA controller chips are obteainable. Sophisticated systems make use of dedicated microcessor chips as DMA control

35、ers.</p><p>  To summarize,the three input/output techniques discussed here have their own advantages and disadvantages, and are suitable for connecting to different types of devices.The programmed input/out

36、put is suitable for use with fast devices which are regularly providing data to the microcomputer.Interrupted input/output can be used with slow peripherals such as teletypewriters.High-speed data transfer between the me

37、mory and external storage devices,such as floppy disca,can be achieved by using direct </p><p>  From Microprocessors and Their Manufacturing Application by A.K.K.ochhar and N.D.Burns </p><p>&l

38、t;b>  數(shù)據(jù)傳送指令</b></p><p>  通常,微機與外設(shè)間的數(shù)據(jù)的傳送用三種不同的方法進行:(1)查詢;(2)中斷;(3)直接存儲器存儲。這些方法可單獨使用或組合使用。</p><p><b>  查詢</b></p><p>  查詢程序用于編程輸入/輸出目的。在規(guī)定的時間間隔內(nèi),不斷的查詢連接到各微機上的各外

39、設(shè),以便確定是否裝置要求向微處理器輸入數(shù)據(jù)。類似的,當向輸出裝置輸出數(shù)據(jù)時,要檢查該裝置緩沖器的狀態(tài),以便決定是否已空和是否準備就緒接受數(shù)據(jù)。這就要求用軟件程序來檢查外設(shè)的狀態(tài)。用硬件標志來表示外部設(shè)備的發(fā)送和接收數(shù)據(jù)。若某裝置已準備好傳送數(shù)據(jù),便可用合適的軟件程序來為特定的裝置服務(wù),進行數(shù)據(jù)傳送。確保在執(zhí)行查詢程序或任何外設(shè)的服務(wù)程序時。來自任何外設(shè)的數(shù)據(jù)都不會丟失,這是十分必要的。由于多數(shù)外設(shè)都是慢速裝置,故丟失數(shù)據(jù)的可能性很小。其

40、他方法,如直接存儲器存?。―MA),可用于實現(xiàn)與特定外設(shè)間的高速數(shù)據(jù)傳送。</p><p>  查詢式輸入/輸出是一種簡單又常用的數(shù)據(jù)傳送法,此法不要求附加的邏輯電路。唯一的要求是要有一個高速運行的有效程序。</p><p><b>  中斷式輸入/輸出</b></p><p>  查詢過程是分時的一種形式,靠它計算機資源可為若干用戶所共享。計

41、算機不斷的查詢每個終端,在轉(zhuǎn)至下一個終端之前,為某一個終端服務(wù)一段特定的時間。這種方法效率不高,因為不管實際是否需要便去查詢?nèi)客庠O(shè),導(dǎo)致系統(tǒng)開銷增大。可供執(zhí)行的指令的時間將顯著減少。此外,要對過程控制系統(tǒng)的實時要求做出相應(yīng),也是不可能的。在過程控制中,當處理器正在為某一個輸入/輸出裝置服務(wù)時,另一特定裝置可能要求緊急服務(wù)。在某些情況下,實際數(shù)據(jù)就可能被失。應(yīng)用硬件中斷輸入/輸出系統(tǒng)便可克服這些缺點。利用這些中斷,微機系統(tǒng)的輸出就可得到

42、明顯的提高,因為輸入/輸出裝置僅在它表示了已經(jīng)準備好發(fā)送和接收數(shù)據(jù)之后,才被服務(wù)。任何時刻都可能有輸入/輸出請求,也就是說是一種異步方式,有關(guān)裝置通過將中斷標志置1,來表示申請中斷。微處理器響應(yīng)中斷,完成現(xiàn)行指令的執(zhí)行,保存好寄存器的內(nèi)容,然后通過把控制轉(zhuǎn)至合適的輸入/輸出程序,來表示發(fā)出中斷請求的裝置服務(wù)。一旦完成對外設(shè)的服務(wù),微處理器便將中斷請示標志復(fù)位,以表示該裝置已被服務(wù),控制轉(zhuǎn)回到原程序,并從它被中斷的地方重新執(zhí)行。</

43、p><p>  某些實時控制要用到一些執(zhí)行時決不允許中斷的關(guān)鍵程序。有些中斷請求是無關(guān)緊要的,而另一些則是務(wù)必要給予響應(yīng)的。例如,數(shù)據(jù)輸入可以推遲,而報警就必須立即響應(yīng)。不同類型的中斷(可屏蔽及不可屏蔽中斷)便可用來克服這些困難。用軟件程序來開或關(guān)可屏蔽中斷。于是,若可屏蔽中斷已被關(guān)閉,微處理器將不響應(yīng)中斷請求。微處理器對非屏蔽中斷請求必須響應(yīng),并為其服務(wù)。</p><p>  微機系統(tǒng)中應(yīng)用

44、的中斷可能是固定中斷,也可能是向量中斷。固定中斷要求相對簡單的硬件。中斷請求線置1,就表示裝置有中斷請求。如果只有一個裝置連至中斷線,那么控制將轉(zhuǎn)至提供為該裝置服務(wù)的程序固定存儲單元。若多個裝置連至給定的中斷線,而每個裝置均有自己的中斷服務(wù)程序,那么就必須得識別發(fā)出中斷的外設(shè)。為此,必須用查詢程序判斷出要求服務(wù)的外設(shè),然后確定為該外設(shè)服務(wù)的程序的起始地址。多中斷線便可用來克服這些困難。</p><p>  具有多

45、條中斷線的中斷請求提供為響應(yīng)某一特定中斷線的中斷請求,程序所應(yīng)轉(zhuǎn)至的不同存儲單元。如果一個以上的裝置連接至同一根中斷請求線,那就有必要使用與中斷裝置數(shù)目相同的中斷線數(shù)或者采用查詢程序。</p><p>  另一種辦法是使用能直接鑒別中斷裝置的中斷向量,這種中斷裝置鑒別法可用來為發(fā)出中斷的裝置查出其服務(wù)程序的起始地址。有些中斷向量不僅能鑒別中斷裝置,還能提供程序應(yīng)跳至的服務(wù)的起始地址。為此,保存在外設(shè)控制器中的存儲

46、單元的地址要放到數(shù)據(jù)總線上去,并用來傳送控制。</p><p>  只有一個能中斷微機正常工作的裝置的系統(tǒng),是很簡單的系統(tǒng)。該特定中斷很容易得到服務(wù)。實際上,大量的裝置都可能向微機發(fā)出中斷請求。在正常的情況下,很可能兩個或更多的裝置同時提出中斷請求。于是,就有必要確定分配給每個中斷請求的優(yōu)先權(quán)。優(yōu)先權(quán)分配有多種方法。</p><p>  利用簡單的菊花鏈方法,可將中斷優(yōu)先權(quán)分配給連至單一中

47、斷線上的多個外部設(shè)備。一旦有中斷請求,微機便給菊花鏈中的第一個裝置發(fā)出一個信號。若中斷是該裝置發(fā)出的,它將提供其中斷服務(wù)的地址。該信號便不傳至菊花鏈中其他的裝置??墒?,如果中斷不是第一個裝置發(fā)出的,那么該信號將被傳至下一個裝置。這一過程是一直重復(fù)到發(fā)出中斷申請的裝置被找到為止。很明顯,菊花鏈中的第一個位置具有最高優(yōu)先權(quán),其次是第二個,等等。一旦某中斷請求得以響應(yīng),并正在被服務(wù),所有其他中斷請求要么被關(guān)閉,要么必須允許優(yōu)先權(quán)高的中斷去中斷

48、正在執(zhí)行的服務(wù)程序。</p><p>  替代菊花鏈的另一方法是利用優(yōu)先權(quán)中斷電路,該電路能鑒別并為優(yōu)先權(quán)最高的裝置服務(wù)。級別0表示優(yōu)先權(quán)最高,隨后的是級別1,2等等。這些優(yōu)先權(quán)中斷電路通過微處理器檢查3位碼,便可鑒別高達8級的中斷。由于像斷電這樣的事件務(wù)必很快的鑒別,并且要盡快報警,這類子系統(tǒng)就要連結(jié)在中斷優(yōu)先權(quán)較高的地方。類似地,其他要求快速響應(yīng)的外設(shè),要比低速外設(shè)配以較高的優(yōu)先權(quán)。有供序員選擇性的屏蔽一級或

49、多級的方法。若某中斷請求正在服務(wù)時,發(fā)生另一個中斷請求,那么這個新中斷請求的優(yōu)先權(quán)要與先行中斷的優(yōu)先權(quán)進行比較。允許優(yōu)先權(quán)較高的中斷終止現(xiàn)行的中斷服務(wù),優(yōu)先權(quán)較低的中斷要一直等到優(yōu)先權(quán)較高的中斷被服務(wù)完之后。</p><p>  某些現(xiàn)有的中斷優(yōu)先權(quán)電路遠不止完成對優(yōu)先權(quán)最高的中斷的鑒別,它們還提供控制應(yīng)轉(zhuǎn)至的存儲單元的地址。若同時出現(xiàn)兩個中斷請求,微機程序所服務(wù)的裝置將具有較高的優(yōu)先權(quán)。</p>

50、<p><b>  直接存儲器存儲</b></p><p>  盡管中斷式輸入/輸出的吞吐率高于查詢法,但還是不能滿足許多高速數(shù)據(jù)傳送應(yīng)用的要求,直接存儲器存?。―MA)技術(shù)不使用CPU,顯著的提高了數(shù)據(jù)傳送速率,其速度高達存儲器周期所能接受的速度。另一個制約因素是外設(shè)的速度。DMA技術(shù)用于要求高速的向存儲器寫入數(shù)據(jù)或在存儲器連至微機的海量存儲器裝置間進行數(shù)據(jù)傳送。DMA要求在存儲

51、器與合適的外設(shè)間進行數(shù)據(jù)傳送時,把全部裝置(而非僅只用于數(shù)據(jù)傳送的那哥裝置)都從存儲器分離出來。專用的DMA控制器可用來實現(xiàn)這種高速的數(shù)據(jù)塊傳送。DMA控制器使用地址總線和數(shù)據(jù)總線進行數(shù)據(jù)傳送。</p><p>  DMA操作可用不同方式進行。在DMA操作期間,完全中至微處理器的正常操作是可能的。在這種特定類型的DMA操作中,希望進行高速數(shù)據(jù)傳送的外設(shè)用中斷信號通知DMA控制器。在進行高速數(shù)據(jù)傳送之前,控制器必須

52、獲得對數(shù)據(jù)和地址總線的控制。這是通過對微處理器發(fā)出HOLD信號實現(xiàn)的,微處理器在執(zhí)行完現(xiàn)行指令后,暫停它的操作。把數(shù)據(jù)和地址總線的控制轉(zhuǎn)給DMA控制器,數(shù)據(jù)塊的起始單元地址以及欲傳送的字數(shù)要賦給DMA控制器。然后,數(shù)據(jù)便在存儲器和外設(shè)之間進行傳送。在數(shù)據(jù)傳送期間,微處理器不進行任何其他的操作。這類被稱為可見的或噴發(fā)式的DMA操作,其速度相當高,常用與微機系統(tǒng)。但是,微處理器的操作速度卻被降低了。</p><p>

53、  另一種用于大系統(tǒng)的DMA方式,采用機器周期挪用。在周期挪用期間,微處理器執(zhí)行不涉及存儲器訪問和使用數(shù)據(jù)總線的其他任務(wù)。每次傳送一個字節(jié)。從處理器的正常操作未被中止的意義上講,周期挪用對微機而言是透明的。這種方式的DMA操作,要求CPU和外部器件絕不能試圖同時訪問存儲器。</p><p>  絕大多數(shù)已有的微處理器都有DMA功能,并且合適的基于大規(guī)模集成電路的DMA控制芯片也是可以買到的。復(fù)雜系統(tǒng)用專用微處理器

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