外文翻譯---arm cortex-m3脈寬調(diào)制器 (pwm)與通用定時(shí)器

1、<p><b>　　畢業(yè)設(shè)計(jì)（論文）</b></p><p><b>　　外文翻譯</b></p><p>　　學(xué)生姓名： </p><p>　　院（系）： </p><p>　　專業(yè)班級(jí)：

2、 </p><p>　　指導(dǎo)教師： </p><p>　　完成日期： </p><p>　　ARM Cortex-M3脈寬調(diào)制器 (PWM)與通用定時(shí)器</p><p><b>　　1.PWM</b></p>

3、<p>　　脈寬調(diào)制（PWM）是一項(xiàng)功能強(qiáng)大的技術(shù)，它是一種對(duì)模擬信號(hào)電平進(jìn)行數(shù)字化編碼的方法。在脈寬調(diào)制中使用高分辨率計(jì)數(shù)器來(lái)產(chǎn)生方波，并且可以通過(guò)調(diào)整方波的占空比來(lái)對(duì)模擬信號(hào)電平進(jìn)行編碼。PWM通常使用在開(kāi)關(guān)電源（switching power）和電機(jī)控制中。</p><p>　　StellarisPWM模塊由 3個(gè) PWM發(fā)生器模塊 1個(gè)控制模塊組成。每個(gè) PWM發(fā)生器模塊包含1個(gè)定時(shí)器（16

4、位遞減或先遞增后遞減計(jì)數(shù)器），2個(gè)PWM比較器，PWM信號(hào)發(fā)生器，死區(qū)發(fā)生器和中斷/ADC-觸發(fā) 選擇器。而控制模塊決定了PWM信號(hào)的極性，以及將哪個(gè)信號(hào)傳遞到管腳。</p><p>　　每個(gè) PWM發(fā)生器模塊產(chǎn)生兩個(gè)PWM信號(hào)，這兩個(gè)PWM信號(hào)可以是獨(dú)立的信號(hào)（基于同一定時(shí)器因而頻率相同的獨(dú)立信號(hào)除外），也可以是一對(duì)插入了死區(qū)延遲的互補(bǔ)（complementary）信號(hào)。這些PWM發(fā)生模塊的輸出信號(hào)在傳遞到器件

5、管腳之前由輸出控制模塊管理。</p><p>　　StellarisPWM模塊具有極大的靈活性。它可以產(chǎn)生簡(jiǎn)單的PWM信號(hào)，如簡(jiǎn)易充電泵需要的信號(hào)；也可以產(chǎn)生帶死區(qū)延遲的成對(duì)PWM信號(hào)，如供半-H橋（half-H bridge）驅(qū)動(dòng)電路使用的信號(hào)。3個(gè)發(fā)生器模塊也可產(chǎn)生3相反相器橋所需的完整6通道門控。</p><p><b>　　PWM定時(shí)器</b></p&g

6、t;<p>　　每個(gè)PWM發(fā)生器的定時(shí)器都有兩種工作模式：遞減計(jì)數(shù)模式或先遞增后遞減計(jì)數(shù)模式。在遞減計(jì)數(shù)模式中，定時(shí)器從裝載值開(kāi)始計(jì)數(shù)，計(jì)數(shù)到零時(shí)又返回到裝載值并繼續(xù)遞減計(jì)數(shù)。在先遞增后遞減計(jì)數(shù)模式中，定時(shí)器從0開(kāi)始往上計(jì)數(shù)，一直計(jì)數(shù)到裝載值，然后從裝載值遞減到零，接著再遞增到裝載值，依此類推。通常，遞減計(jì)數(shù)模式是用來(lái)產(chǎn)生左對(duì)齊或右對(duì)齊的PWM信號(hào)，而先遞增后遞減計(jì)數(shù)模式是用來(lái)產(chǎn)生中心對(duì)齊的PWM信號(hào)。</p>

7、<p>　　PWM定時(shí)器輸出3個(gè)信號(hào)，這些信號(hào)在生成PWM信號(hào)的過(guò)程中使用：方向信號(hào)（在遞減計(jì)數(shù)模式中，該信號(hào)始終為低電平，在先遞增后遞減計(jì)數(shù)模式中，則是在低高電平之間切換）；當(dāng)計(jì)數(shù)器計(jì)數(shù)值為0時(shí)，一個(gè)寬度等于時(shí)鐘周期的高電平脈沖；當(dāng)計(jì)數(shù)器計(jì)數(shù)值等于裝載值時(shí)，一個(gè)寬度等于時(shí)鐘周期的高電平脈沖。注：在遞減計(jì)數(shù)模式中，零脈沖之后緊跟著一個(gè)裝載脈沖。</p><p><b>　　PWM比較器&l

8、t;/b></p><p>　　每個(gè)PWM發(fā)生器含兩個(gè)比較器，用于監(jiān)控計(jì)數(shù)器的值；當(dāng)比較器的值與計(jì)數(shù)器的值相等時(shí)，比較器輸出寬度為單時(shí)鐘周期的高電平脈沖。在先遞增后遞減計(jì)數(shù)模式中，比較器在遞增和遞減計(jì)數(shù)時(shí)都要進(jìn)行比較，因此必須通過(guò)計(jì)數(shù)器的方向信號(hào)來(lái)限定。這些限定脈沖在生成PWM信號(hào)的過(guò)程中使用。如果任一比較器的值大于計(jì)數(shù)器的裝載值，則該比較器永遠(yuǎn)不會(huì)輸出高電平脈沖。</p><p>

9、<b>　　PWM信號(hào)發(fā)生器</b></p><p>　　PWM發(fā)生器捕獲這些脈沖（由方向信號(hào)來(lái)限定），并產(chǎn)生兩個(gè)PWM信號(hào)。在遞減計(jì)數(shù)模式中，能夠影響PWM信號(hào)的事件有4個(gè)：零、裝載、匹配A遞減、匹配B遞減。在先遞增后遞減計(jì)數(shù)模式中，能夠影響PWM信號(hào)的事件有6個(gè)：零、裝載、匹配A遞減、匹配A遞增、匹配B遞減、匹配B遞增。當(dāng)匹配A或匹配B事件與零或裝載事件重合時(shí)，它們可以被忽略。如果匹配A

10、與匹配B事件重合，則第一個(gè)信號(hào)PWMA只根據(jù)匹配A事件生成，第二個(gè)信號(hào)PWMB只根據(jù)匹配B事件生成。</p><p><b>　　死區(qū)發(fā)生器</b></p><p>　　PWM發(fā)生器產(chǎn)生的兩個(gè)PWM信號(hào)被傳遞到死區(qū)發(fā)生器。如果死區(qū)發(fā)生器禁能，則PWM信號(hào)只簡(jiǎn)單地通過(guò)該模塊，而不會(huì)發(fā)生改變。如果死區(qū)發(fā)生器使能，則丟棄第二個(gè)PWM信號(hào)，并在第一個(gè)PWM信號(hào)基礎(chǔ)上產(chǎn)生兩個(gè)P

11、WM信號(hào)。第一個(gè)輸出PWM信號(hào)為帶上升沿延遲的輸入信號(hào)，延遲時(shí)間可編程。第二個(gè)輸出PWM信號(hào)為輸入信號(hào)的反相信號(hào)，在輸入信號(hào)的下降沿和這個(gè)新信號(hào)的上升沿之間增加了可編程的延遲時(shí)間。</p><p>　　中斷/ADC-觸發(fā) 選擇器</p><p>　　PWM發(fā)生器還捕獲相同的4個(gè)（或6個(gè)）計(jì)數(shù)器事件，并使用它們來(lái)產(chǎn)生中斷或ADC觸發(fā)信號(hào)。用戶可以選擇這些事件中的任一個(gè)或一組作為中斷源；只要其

12、中一個(gè)所選事件發(fā)生就會(huì)產(chǎn)生中斷。此外，你也可以選擇相同事件、不同事件、同組事件、不同組事件作為ADC觸發(fā)源；只要其中一個(gè)所選事發(fā)生就會(huì)產(chǎn)生ADC觸發(fā)脈沖。選擇的事件不同，在PWM信號(hào)內(nèi)產(chǎn)生中斷 或ADC觸發(fā) 的位置也不同。注：中斷 和ADC 觸發(fā)都是基于原始（raw）事件的；而不考慮死區(qū)發(fā)生器在PWM信號(hào)邊沿上產(chǎn)生的延遲。</p><p><b>　　同步方法</b></p>

13、<p>　　具有全局復(fù)位功能，該功能可同時(shí)復(fù)位PWM發(fā)生器中的任何或全部計(jì)數(shù)器。如果多個(gè)PWM發(fā)生器使用相同的計(jì)數(shù)器裝載值來(lái)配置，那么可以保證PWM發(fā)生器也具有相同的計(jì)數(shù)值（這不表示PWM發(fā)生器必須在其同步之前被配置）。這樣，通過(guò)那些信號(hào)邊沿之間的已知關(guān)系可產(chǎn)生2個(gè)以上的PWM信號(hào)，因?yàn)橛?jì)數(shù)器總是具有相同的值。</p><p>　　在PWM發(fā)生器中，要對(duì)計(jì)數(shù)器裝載值和比較器匹配值進(jìn)行更新有兩種方法。一種

14、是立即更新，計(jì)數(shù)器計(jì)數(shù)一到零就立即使用新值。由于要等計(jì)數(shù)器計(jì)數(shù)到零才能使用新值，因而在更新過(guò)程中定義了一個(gè)約定（guaranteed）行為，避免出現(xiàn)過(guò)短或過(guò)長(zhǎng)的PWM輸出脈沖。</p><p>　　另一種方法是同步更新，它要等全局同步更新信號(hào)有效才使用新值，同步更新信號(hào)有效時(shí)，計(jì)數(shù)器</p><p>　　一到零就立即使用新值。第二種方法可以同時(shí)對(duì)多個(gè)PWM發(fā)生器中的多項(xiàng)進(jìn)行更新，而不會(huì)在更

15、新過(guò)程中出現(xiàn)意外的影響；所有邏輯在根據(jù)新值運(yùn)行之前都先在原來(lái)的值上運(yùn)行。 裝載和比較器匹配的更新方法可以在各個(gè)PWM發(fā)生器模塊中單獨(dú)配置。當(dāng)那些模塊中的定時(shí)器同步時(shí)，通常可以在PWM發(fā)生器模塊中使用同步更新機(jī)制，盡管該機(jī)制正常工作時(shí)不要求這個(gè)。</p><p><b>　　故障狀態(tài)</b></p><p>　　影響PWM模塊的外部條件有兩個(gè)；一個(gè)是故障管腳的信號(hào)輸入，

16、另一個(gè)是由調(diào)試器引發(fā)的控制器中止。我們可以采用兩種機(jī)制來(lái)處理這些情況，一是強(qiáng)制將輸出信號(hào)變?yōu)闊o(wú)效（inactive）狀態(tài)，以及/或者讓PWM定時(shí)器停止運(yùn)行。</p><p>　　每個(gè)輸出信號(hào)都帶有一個(gè)故障位。若故障位置位，則故障輸入信號(hào)將會(huì)使相應(yīng)的輸出信號(hào)變?yōu)闊o(wú)效狀態(tài)。如果無(wú)效狀態(tài)指的是信號(hào)能夠長(zhǎng)期停留的安全狀態(tài)，那么這樣可避免輸出信號(hào)在故障狀態(tài)下以危險(xiǎn)的方式驅(qū)動(dòng)外部電路。此外，故障條件還可以產(chǎn)生控制器中斷。&l

17、t;/p><p>　　用戶可以將PWM發(fā)生器配置為在停止條件期間停止計(jì)數(shù)。T也可以選擇讓計(jì)數(shù)器一直運(yùn)行，直到計(jì)數(shù)值為零才停止，或計(jì)數(shù)值為零時(shí)繼續(xù)計(jì)數(shù)和重裝。停止?fàn)顟B(tài)不會(huì)產(chǎn)生控制器中斷。</p><p><b>　　輸出控制模塊</b></p><p>　　每個(gè) PWM發(fā)生器模塊產(chǎn)生的是兩個(gè)原始PWM信號(hào)，輸出控制模塊在PWM信號(hào)進(jìn)入管腳之前要對(duì)其最

18、后的狀態(tài)進(jìn)行控制。通過(guò)一個(gè)寄存器就能夠?qū)?shí)際傳遞到管腳的PWM信號(hào)進(jìn)行修改。例如，通過(guò)對(duì)寄存器執(zhí)行寫操作來(lái)修改PWM信號(hào)（而無(wú)需通過(guò)修改反饋控制回路來(lái)修改各個(gè)PWM發(fā)生器），以實(shí)現(xiàn)無(wú)電刷直流電機(jī)通信。同樣地，故障控制也能夠禁能所有的PWM信號(hào)。能夠?qū)θ我籔WM信號(hào)執(zhí)行最終的反相操作，使得默認(rèn)高電平有效的信號(hào)變?yōu)榈碗娖接行А?lt;/p><p><b>　　2.通用定時(shí)器</b></p>

19、;<p>　　可編程定時(shí)器可對(duì)驅(qū)動(dòng)定時(shí)器輸入管腳的外部事件進(jìn)行計(jì)數(shù)或定時(shí)。Stellaris? 通用定時(shí)器模塊(GPTM) 包含 3個(gè) GPTM 模塊 (定時(shí)器0, 定時(shí)器1和定時(shí)器 2)。每個(gè)GPTM模塊包含兩個(gè)16位的定時(shí)器/計(jì)數(shù)器（稱作TimerA和TimerB），用戶可以將它們配置成獨(dú)立運(yùn)行的定時(shí)器 或事件計(jì)數(shù)器，或?qū)⑺鼈兣渲贸?個(gè)32位定時(shí)器 或一個(gè)32位實(shí)時(shí)時(shí)鐘 (RTC)。定時(shí)器也可用于觸發(fā)模數(shù)(ADC) 轉(zhuǎn)

20、換。由于所有通用定時(shí)器的觸發(fā)信號(hào)在到達(dá)ADC模塊前一起進(jìn)行或操作，因而只需使用一個(gè)定時(shí)器來(lái)觸發(fā)ADC事件。</p><p>　　注意: 定時(shí)器2是一個(gè)內(nèi)部定時(shí)器，只能用來(lái)產(chǎn)生內(nèi)部中斷 或觸發(fā)ADC時(shí)間。</p><p>　　通用定時(shí)器模塊是 Stellaris? 微控制器的一個(gè)定時(shí)資源。其它定時(shí)器資源還包括系統(tǒng)定時(shí)器 (SysTick)支持以下模式：</p><p>

21、;　　■ 32-位定時(shí)器模式</p><p>　　– 可編程單次觸發(fā)（one-shot）定時(shí)器</p><p>　　– 可編程周期定時(shí)器</p><p>　　– 使用32.768-KHz 輸入時(shí)鐘的實(shí)時(shí)時(shí)鐘</p><p>　　– 事件的停止可由軟件來(lái)控制(RTC模式除外)</p><p>　　■ 16-位定時(shí)器模式&

22、lt;/p><p>　　– 帶8位預(yù)分頻器的通用定時(shí)器功能模塊 (僅單次觸發(fā)模式和周期模式)</p><p>　　– 可編程單次觸發(fā)（one-shot）定時(shí)器</p><p>　　– 可編程周期定時(shí)器</p><p>　　– 事件的停止可由軟件來(lái)控制</p><p>　　■ 16-位輸入捕獲模式</p>&l

23、t;p>　　– 輸入邊沿計(jì)數(shù)捕獲</p><p>　　– 輸入邊沿定時(shí)捕獲</p><p>　　■ 16-位PWM模式</p><p>　　– 簡(jiǎn)單的PWM模式，可通過(guò)軟件實(shí)現(xiàn)PWM信號(hào)的輸出反相。</p><p><b>　　功能描述</b></p><p>　　每個(gè)GPTM模塊的主要元件

24、包括兩個(gè)自由運(yùn)行的先遞增后遞減計(jì)數(shù)器（稱作TimerA和TimerB）、兩個(gè)16位匹配寄存器、兩個(gè)預(yù)分頻器匹配寄存器、兩個(gè)16位裝載/初始化寄存器和它們相關(guān)的控制功能。GPTM的準(zhǔn)確功能可由軟件來(lái)控制，并通過(guò)寄存器接口進(jìn)行配置。</p><p>　　在通過(guò)軟件對(duì)GPTM進(jìn)行配置時(shí)需用到GPTM 配置 (GPTMCFG) 寄存器 、GPTM TimerA模式 (GPTMTAMR) 寄存器和 GPTM TimerB

25、模式 (GPTMTBMR) 寄存器。當(dāng)GPTM模塊處于其中一種32位模式時(shí)，該定時(shí)器只能作為32位定時(shí)器使用。但如果配置為16位模式，則GPTM的兩個(gè)16位定時(shí)器可配置為16位模式的任意組合。</p><p><b>　　GPTM 復(fù)位條件</b></p><p>　　GPTM模塊復(fù)位后處于未激活狀態(tài)，所有控制寄存器均被清零，同時(shí)進(jìn)入默認(rèn)狀態(tài)。計(jì)數(shù)器TimerA和Ti

26、merB連同與它們對(duì)應(yīng)的裝載寄存器：GPTM TimerA 間隔裝載（GPTMTAILR） 寄存器和 GPTM TimerB 間隔裝載 （GPTMTBILR）寄存器一起初始化為0xFFFF。</p><p>　　預(yù)分頻計(jì)數(shù)器：GPTM TimerA 預(yù)分頻(GPTMTAPR) 寄存器) 和GPTM TimerB 預(yù)分頻(GPTMTBPR) 寄存器初始化為0x00。</p><p><

27、b>　　位定時(shí)器工作模式</b></p><p>　　介紹GPTM的3種32位定時(shí)器模式（單次觸發(fā)、周期、RTC），并對(duì)其配置進(jìn)行描述。</p><p>　　通過(guò)向GPTM 配置 (GPTMCFG)寄存器寫入0（單次觸發(fā)/32位周期定時(shí)器模式）或1（RTC模式），可將GPTM模塊配置為32位模式。在兩種配置中，都需將某些GPTM寄存器連在一起形成偽32位寄存器。這些寄存器

28、包括：</p><p>　　■ GPTM TimerA 間隔裝載（GPTMTAILR） 寄存器 [15:0]， </p><p>　　■ GPTM TimerB 間隔裝載（GPTMTBILR） 寄存器 [15:0]， </p><p>　　■ GPTM TimerA（GPTMTAR） 寄存器 [15:0]， </p><p>　　■ GPTM

29、 TimerB （GPTMTBR） 寄存器 [15:0]， </p><p>　　在32位模式中，GPTM把對(duì)GPTMTAILR的32位寫訪問(wèn)轉(zhuǎn)換為對(duì)GPTMTAILR和GPTMTBILR的寫訪問(wèn)。這樣，寫操作最終的字順序?yàn)椋篏PTMTBILR[15:0]:GPTMTAILR[15:0]同樣，對(duì)GPTMTAR的讀操作返回的值為：GPTMTBR[15:0]:GPTMTAR[15:0]</p><

30、p>　　32-位單次觸發(fā)/周期定時(shí)器模式</p><p>　　在32位單次觸發(fā)和周期定時(shí)器模式中，TimerA和TimerB寄存器連在一起被配置為32位遞減計(jì)數(shù)器。</p><p>　　然后根據(jù)寫入GPTM TimerA模式 (GPTMTAMR)寄存器 (見(jiàn) 167頁(yè))的 TAMR 位域的值可確定選擇的是單次觸發(fā)模式還是周期模式，此時(shí)不需要寫GPTM TimerB 模式 (GPTMT

31、BMR) 寄存器。</p><p>　　當(dāng)軟件對(duì)GPTM 控制 (GPTMCTL) 寄存器 (見(jiàn) 171頁(yè))的TAEN位執(zhí)行寫操作時(shí)，定時(shí)器從其預(yù)加載的值開(kāi)始遞減計(jì)數(shù)。當(dāng)?shù)竭_(dá)0x0000.0000狀態(tài)時(shí)，定時(shí)器會(huì)在下一個(gè)周期從相連的GPTMTAILR中重新裝載它的初值。如果配置為單次觸發(fā)模式，則定時(shí)器停止計(jì)數(shù)并將GPTMCTL寄存器的TAEN位清零。如果配置為周期定時(shí)器，它將繼續(xù)計(jì)數(shù)。</p>&l

32、t;p>　　除了重裝計(jì)數(shù)值，GPTM還在到達(dá)0x00000000狀態(tài)時(shí)產(chǎn)生中斷并輸出觸發(fā)信號(hào)。GPTM將GPTM 原始中斷狀態(tài) (GPTMRIS)寄存器 中的TATORIS位置位，并保持該值直到向GPTM 中斷清零</p><p>　　(GPTMICR) 寄存器執(zhí)行寫操作將其清零。如果GPTM 中斷屏蔽 (GPTIMR) 寄存的超時(shí)(time-out)中斷使能，則GPTM還將GPTM 屏蔽后的中斷狀態(tài) (G

33、PTMMIS) 寄存器 的TATOMIS位置位。輸出觸發(fā)信號(hào)是一個(gè)單時(shí)鐘周期的脈沖，它在計(jì)數(shù)器剛好到達(dá)0x00000000狀態(tài)時(shí)生效，在緊接著的下一個(gè)周期失效。通過(guò)將GPTMCTL中的TAOTE位置位可將輸出觸發(fā)使能，并且可以觸發(fā)啟動(dòng)轉(zhuǎn)換（SoC）事件，如ADC轉(zhuǎn)換。如果軟件在計(jì)數(shù)器運(yùn)行過(guò)程中重裝GPTMTAILR寄存器，則計(jì)數(shù)器在下一個(gè)時(shí)鐘周期裝載新值并從新值繼續(xù)計(jì)數(shù)。如果GPTMCTL寄存器的TASTALL 位有效，則定時(shí)器停止（f

34、reeze）計(jì)數(shù)直到該信號(hào)失效。</p><p>　　32-位實(shí)時(shí)時(shí)鐘定時(shí)器模式</p><p>　　在實(shí)時(shí)時(shí)鐘（RTC）模式中，TimerA和TimerB寄存器連在一起被配置為32位遞增計(jì)數(shù)器。在首次選擇RTC模式時(shí)，計(jì)數(shù)器裝載的值為0x0000.0001。后面裝載的值全都必須通過(guò)控制器寫入GPTMTimerA 匹配 (GPTMTAMATCHR) 寄存器。</p><

35、p>　　在RTC模式中，要求CCP0, CCP2或CCP4管腳上的輸入時(shí)鐘為32.768KHz。然后將時(shí)鐘信號(hào)分頻為1Hz，將其傳送給32位計(jì)數(shù)器的輸入端。</p><p>　　在軟件寫GPTMCTL中的TAEN位時(shí)，計(jì)數(shù)器從其預(yù)裝載的值0x0000.0001開(kāi)始遞增計(jì)數(shù)。在當(dāng)前計(jì)數(shù)值與GPTMTAMATCHR中的預(yù)裝載值匹配時(shí)，計(jì)數(shù)器返回到0x0000.0000并繼續(xù)計(jì)數(shù)，直到出現(xiàn)硬件復(fù)位或被軟件禁能（T

36、AEN位清零），計(jì)數(shù)停止。當(dāng)計(jì)數(shù)值與預(yù)裝載值匹配時(shí)，GPTM讓GPTMRIS中的RTCRIS位有效。如果GPTIMR中的RTC中斷使能，那么GPTM 也會(huì)將GPTMISR中的 RTCMIS位置位并產(chǎn)生一個(gè)控制器中斷。 通過(guò)寫 GPTMICR的RTCCINT位可將狀態(tài)標(biāo)志清零。如果GPTMCTL寄存器中的 TASTALL位和/或 TBSTALL 位置位，那么定時(shí)器在GPTMCTL的RTCEN位置位時(shí)不會(huì)停止計(jì)數(shù)。</p>&

37、lt;p>　　16-位定時(shí)器的工作模式</p><p>　　通過(guò)向GPTM配置 (GPTMCFG) 寄存器寫入0x04，可將GPTM配置為全局16位模式。本小節(jié)將描述每一個(gè)GPTM的16-位操作模式。TimerA和TimerB的模式相同，因此我們只介紹一次，并用字母n來(lái)表示這兩個(gè)定時(shí)器的寄存器。</p><p>　　16-位單次觸發(fā)/周期定時(shí)器模式</p><p&

38、gt;　　在16位單次觸發(fā)/周期定時(shí)器模式中，定時(shí)器被配置為帶可選的8位預(yù)分頻器的16位遞減計(jì)數(shù)器，預(yù)分頻器可有效地將定時(shí)器的計(jì)數(shù)范圍擴(kuò)大到24位。選擇單次觸發(fā)模式還是周期模式由寫入 GPTMTnMR寄存器中TnMR位域的值來(lái)決定?？蛇x預(yù)分頻器中的值被加載到GPTM Timern 預(yù)分頻 (GPTMTnPR)寄存器中。</p><p>　　在軟件對(duì)GPTMCTL寄存器的TnEN位執(zhí)行寫操作時(shí)，定時(shí)器從其預(yù)裝載的值

39、開(kāi)始遞減計(jì)數(shù)。一旦到達(dá)0x0000狀態(tài)，定時(shí)器便在下一個(gè)周期到來(lái)時(shí)將GPTMTnILR和GPTMTnPR的值重新載入。如果配置為單次觸發(fā)模式，則定時(shí)器停止計(jì)數(shù)并將GPTMCTL寄存器的TnEN位清零。如果配置為周期定時(shí)器，它將繼續(xù)計(jì)數(shù)。在到達(dá)0x0000狀態(tài)時(shí)，定時(shí)器除了重裝計(jì)數(shù)值，還產(chǎn)生中斷并輸出觸發(fā)信號(hào)。GPTM將GPTMRIS寄存器的TnTORIS位置位，并保持該值直到執(zhí)行GPTMICR寄存器寫操作將該位清零。如果GPTIMR的超

40、時(shí)中斷使能，則GPTM還將 GPTMISR寄存器的TnTOMIS位置位并產(chǎn)生控制器中斷。輸出觸發(fā)信號(hào)是一個(gè)單時(shí)鐘周期的脈沖，在計(jì)數(shù)器剛好到達(dá)0x0000狀態(tài)時(shí)生效，并在緊接著的下一個(gè)周期失效。它通過(guò)對(duì)GPTMCTL寄存器中的TnOTE位置位來(lái)使能，并且可以觸發(fā)啟動(dòng)轉(zhuǎn)換（SoC）事件如ADC轉(zhuǎn)換。如果軟件在計(jì)數(shù)器運(yùn)行過(guò)程中重裝GPTMTAILR寄存器，則計(jì)數(shù)器在下一個(gè)時(shí)鐘周期裝載新值并從新值繼續(xù)計(jì)數(shù)。如果GPTMCTL寄存器中的 TnST

41、ALL 位被使能，那么定時(shí)器停止（freeze</p><p>　　16-位輸入邊沿計(jì)數(shù)模式</p><p>　　在邊沿計(jì)數(shù)模式中，定時(shí)器被配置為能夠捕獲3種事件類型的遞減計(jì)數(shù)器，這3種事件類型為上升沿、下降沿、或上升/下降沿。為了把定時(shí)器設(shè)置為邊沿計(jì)數(shù)模式，GPTMTnMR寄存器的TnCMR 位必須設(shè)為0。定時(shí)器計(jì)數(shù)時(shí)所采用的邊沿類型由GPTMCTL寄存器的TnEVENT位域決定。在初始

42、化過(guò)程中，需對(duì)GPTM Timern 匹配 (GPTMTnMATCHR)寄存器進(jìn)行配置，以便GPTMTnILR寄存器和GPTMTnMATCHR寄存器之間的差值等于必須計(jì)算的邊沿事件的數(shù)目。</p><p>　　當(dāng)軟件寫GPTM控制(GPTMCTL)寄存器的TnEN位時(shí)，定時(shí)器使能并用于事件捕獲。CCP管腳上每輸入一個(gè)事件，計(jì)數(shù)器的值就減1，直到事件計(jì)數(shù)的值與GPTMTnMATCHR的值匹配。這時(shí)，GPTM讓GPT

43、MRIS寄存器的CnMRIS位有效（如果中斷沒(méi)有屏蔽，則也要讓CnMMIS位有效）。然后計(jì)數(shù)器使用GPTMTnILR中的值執(zhí)行重裝操作，并且由于GPTM自動(dòng)將GPTMCTL寄存器的TnEN位清零，因此計(jì)數(shù)器停止計(jì)數(shù)。一旦事件計(jì)數(shù)值滿足要求，接下來(lái)的所有事件都將被忽略, 直到通過(guò)軟件重新將TnEN使能。</p><p>　　在邊沿定時(shí)模式中，定時(shí)器被配置為自由運(yùn)行的遞減計(jì)數(shù)器，其初始值從GPTMTnILR寄存器中加

44、載（復(fù)位時(shí)初始化為0xFFFF）。該模式允許在上升沿或下降沿捕獲事件。通過(guò)置位GPTMTnMR寄存器的TnCMR位可將定時(shí)器置于邊沿定時(shí)模式，而定時(shí)器捕獲時(shí)采用的事件類型由GPTMCnTL寄存器的TnEVENT位域來(lái)決定。</p><p>　　在軟件寫GPTMCTL寄存器的TnEN 位時(shí)，定時(shí)器使能并用于事件捕獲。在檢測(cè)到所選的輸入事件時(shí)，從GPTMTnR寄存器中捕獲Tn計(jì)數(shù)器的當(dāng)前值，且該值可通過(guò)控制器來(lái)讀取。

45、 然后GPTM讓CnERIS位有效（如果中斷沒(méi)有被屏蔽，則也讓CnEMIS位有效）。在捕獲到事件之后，定時(shí)器不會(huì)停止計(jì)數(shù)。它會(huì)繼續(xù)計(jì)數(shù)，直至 TnEN 位清零。當(dāng)定時(shí)器到達(dá)0x0000狀態(tài)時(shí)，將GPTMnILR 寄存器中的值重新載入定時(shí)器。定時(shí)器配置為捕獲上升沿事件。每當(dāng)檢測(cè)到上升沿事件時(shí)，當(dāng)前計(jì)數(shù)值便裝載到GPTMTnR寄存器中，且該值一直保持在寄存器中直到檢測(cè)到下一個(gè)上升沿（在此上升沿處，新的計(jì)數(shù)值裝載到GPTMTnR中）。<

46、/p><p><b>　　16-位PWM模式</b></p><p>　　GPTM支持簡(jiǎn)單的PWM生成模式。在PWM模式中，定時(shí)器配置為遞減計(jì)數(shù)器，初值由GPTMTnILR定義。通過(guò)將GPTMTnMR寄存器的TnAMS位置為0x1、TnCMR位置為0x0、TnMR位域置為0x2來(lái)使能PWM模式。在軟件寫GPTMCTL寄存器的 TnEN 位時(shí)，計(jì)數(shù)器開(kāi)始遞減計(jì)數(shù)，直到計(jì)數(shù)值

47、到達(dá)0x0000。在下一個(gè)計(jì)數(shù)周期，計(jì)數(shù)器將GPTMTnILR寄存器中的值重新載入，作為它的初值（如果使用了預(yù)分頻器，則還要重新裝載GPTMTnPR中的值），并繼續(xù)計(jì)數(shù)直到計(jì)數(shù)器因軟件將GPTMCTL寄存器的TnEN位清零而被禁止。在PWM模式中，不產(chǎn)生中斷或狀態(tài)位。</p><p>　　當(dāng)計(jì)數(shù)器的值與GPTMTnILR 寄存器的值（計(jì)數(shù)器的初始狀態(tài)）相等時(shí)，輸出PWM信號(hào)生效，當(dāng)計(jì)數(shù)器的值與GPTM Timer

48、n 匹配 寄存器 (GPTMnMATCHR)的值相等時(shí)，輸出PWM信號(hào)失效。通過(guò)將GPTMCTL寄存器的TnPWML位置位，軟件可實(shí)現(xiàn)將輸出PWM信號(hào)反相的功能。</p><p>　　Pulse Width Modulator (PWM) General-Purpose Timers</p><p><b>　　1.PWM</b></p><p&g

49、t;　　Pulse width modulation (PWM) is a powerful technique for digitally encoding analog signal levels.High-resolution counters are used to generate a square wave, and the duty cycle of the squarewave is modulated to encod

50、e an analog signal. Typical applications include switching power suppliesand motor control.</p><p>　　The Stellaris® PWM module consists of three PWM generator blocks and a control block. The controlbloc

51、k determines the polarity of the PWM signals, and which signals are passed through to the pins.</p><p>　　Each PWM generator block produces two PWM signals that can either be independent signals(other than be

52、ing based on the same timer and therefore having the same frequency) or a singlepair of complementary signals with dead-band delays inserted. The output of the PWM generationblocks are managed by the output control block

53、 before being passed to the device pins.</p><p>　　The Stellaris® PWM module provides a great deal of flexibility. It can generate simple PWM signals,such as those required by a simple charge pump. It ca

54、n also generate paired PWM signals withdead-band delays, such as those required by a half-H bridge driver. Three generator blocks canalso generate the full six channels of gate controls required by a 3-phase inverter bri

55、dge.</p><p><b>　　PWM Timer</b></p><p>　　The timer in each PWM generator runs in one of two modes: Count-Down mode or Count-Up/Downmode. In Count-Down mode, the timer counts from the

56、load value to zero, goes back to the loadvalue, and continues counting down. In Count-Up/Down mode, the timer counts from zero up to the load value, back down to zero, back up to the load value, and so on. Generally, Cou

57、nt-Down mode is used for generating left- or right-aligned PWM signals, while the Count-Up/Down mode is usedfor generating center-aligned </p><p>　　The timers output three signals that are used in the PWM ge

58、neration process: the direction signal(this is always Low in Count-Down mode, but alternates between Low and High in Count-Up/Down mode), a single-clock-cycle-width High pulse when the counter is zero, and a single-clock

59、-cycle-width High pulse when the counter is equal to the load value. Note that in Count-Down mode, the zeropulse is immediately followed by the load pulse.</p><p>　　PWM Comparators</p><p>　　Ther

60、e are two comparators in each PWM generator that monitor the value of the counter; when either match the counter, they output a single-clock-cycle-width High pulse. When in Count-Up/Down mode, these comparators match bot

61、h when counting up and when counting down; they are therefore qualified by the counter direction signal. These qualified pulses are used in the PWM generation process. If either comparator match value is greater than the

62、 counter load value, then that comparator never outputs </p><p>　　Figure 15-3 on page 493 shows the behavior of the counter and the relationship of these pulses when the counter is in Count-Down mode. Figure

63、 15-4 on page 493 shows the behavior of the counter and the relationship of these pulses when the counter is in Count-Up/Down mode.</p><p>　　PWM Signal Generator</p><p>　　The PWM generator takes

64、 these pulses (qualified by the direction signal), and generates two PWM signals. In Count-Down mode, there are four events that can affect the PWM signal: zero, load,match A down, and match B down. In Count-Up/Down mode

65、, there are six events that can affect the PWM signal: zero, load, match A down, match A up, match B down, and match B up. The match</p><p>　　A or match B events are ignored when they coincide with the zero

66、or load events. If the match A and match B events coincide, the first signal, PWMA, is generated based only on the match A event,and the second signal, PWMB, is generated based only on the match B event.</p><p

67、>　　Dead-Band Generator</p><p>　　The two PWM signals produced by the PWM generator are passed to the dead-band generator. If disabled, the PWM signals simply pass through unmodified. If enabled, the second

68、 PWM signal is lost and two PWM signals are generated based on the first PWM signal. The first output PWM signal is the input signal with the rising edge delayed by a programmable amount. The second output PWM signal is

69、the inversion of the input signal with a programmable delay added between the falling edge of the input sign</p><p>　　Interrupt/ADC-Trigger Selector</p><p>　　The PWM generator also takes the sam

70、e four (or six) counter events and uses them to generate an interrupt or an ADC trigger. Any of these events or a set of these events can be selected as a source for an interrupt; when any of the selected events occur, a

71、n interrupt is generated. Additionally, the same event, a different event, the same set of events, or a different set of events can be selected</p><p>　　as a source for an ADC trigger; when any of these sele

72、cted events occur, an ADC trigger pulse is generated. The selection of events allows the interrupt or ADC trigger to occur at a specific position within the PWM signal. Note that interrupts and ADC triggers are based on

73、the raw events; delays in the PWM signal edges caused by the dead-band generator are not taken into account.</p><p>　　Synchronization Methods</p><p>　　There is a global reset capability that can

74、 synchronously reset any or all of the counters in the PWM generators. If multiple PWM generators are configured with the same counter load value, this can be used to guarantee that they also have the same count value (t

75、his does imply that the PWM generators must be configured before they are synchronized). With this, more than two PWM signals can be produced with a known relationship between the edges of those signals since the counter

76、s always have the</p><p>　　The counter load values and comparator match values of the PWM generator can be updated in two ways. The first is immediate update mode, where a new value is used as soon as the co

77、unter reaches zero. By waiting for the counter to reach zero, a guaranteed behavior is defined, and overly short or overly long output PWM pulses are prevented.</p><p>　　The other update method is synchronou

78、s, where the new value is not used until a global synchronized update signal is asserted, at which point the new value is used as soon as the counter reaches zero. This second mode allows multiple items in multiple PWM g

79、enerators to be updated simultaneously without odd effects during the update; everything runs from the old values until a point at which they all run from the new values. The Update mode of the load and comparator match

80、values can be individua</p><p>　　Fault Conditions</p><p>　　There are two external conditions that affect the PWM block; the signal input on the Fault pin and the stalling of the controller by a

81、debugger. There are two mechanisms available to handle such conditions: the output signals can be forced into an inactive state and/or the PWM timers can be stopped.</p><p>　　Each output signal has a fault b

82、it. If set, a fault input signal causes the corresponding output signal to go into the inactive state. If the inactive state is a safe condition for the signal to be in for an extended period of time, this keeps the outp

83、ut signal from driving the outside world in a dangerous manner during the fault condition. A fault condition can also generate a controller interrupt.</p><p>　　Each PWM generator can also be configured to st

84、op counting during a stall condition. The user can select for the counters to run until they reach zero then stop, or to continue counting and reloading.</p><p>　　A stall condition does not generate a contro

85、ller interrupt.</p><p>　　Output Control Block</p><p>　　With each PWM generator block producing two raw PWM signals, the output control block takes care of the final conditioning of the PWM signa

86、ls before they go to the pins. Via a single register,the set of PWM signals that are actually enabled to the pins can be modified; this can be used, for example, to perform commutation of a brushless DC motor with a sing

87、le register write (and without modifying the individual PWM generators, which are modified by the feedback control loop). Similarly,fault con</p><p>　　General-Purpose Timers</p><p>　　Programmabl

88、e timers can be used to count or time external events that drive the Timer input pins.The Stellaris? General-Purpose Timer Module (GPTM) contains three GPTM blocks (Timer0, Timer1,and Timer 2). Each GPTM block provides t

89、wo 16-bit timers/counters (referred to as TimerA andTimerB) that can be configured to operate independently as timers or event counters, or configuredto operate as one 32-bit timer or one 32-bit Real-Time Clock (RTC).<

90、;/p><p>　　In addition, timers can be used to trigger analog-to-digital conversions (ADC). The ADC triggersignals from all of the general-purpose timers are ORed together before reaching the ADC module,so only o

91、ne timer should be used to trigger ADC events.</p><p>　　The GPT Module is one timing resource available on the Stellaris? microcontrollers. Other timerresources include the System Timer (SysTick) and the PWM

92、 timer in thePWM module.</p><p>　　The General-Purpose Timers provide the following features:</p><p>　　■ Three General-Purpose Timer Modules (GPTM), each of which provides two 16-bittimers/counte

93、rs. Each GPTM can be configured to operate independently:</p><p>　　– As a single 32-bit timer</p><p>　　– As one 32-bit Real-Time Clock (RTC) to event capture</p><p>　　– For Pulse Wi

94、dth Modulation (PWM)</p><p>　　– To trigger analog-to-digital conversions</p><p>　　■ 32-bit Timer modes</p><p>　　– Programmable one-shot timer</p><p>　　– Programmable pe

95、riodic timer</p><p>　　– Real-Time Clock when using an external 32.768-KHz clock as the input</p><p>　　– User-enabled stalling when the controller asserts CPU Halt flag during debug</p>&l

96、t;p>　　– ADC event trigger</p><p>　　■ 16-bit Timer modes</p><p>　　– General-purpose timer function with an 8-bit prescaler (for one-shot and periodic modes only)</p><p>　　– Progra

97、mmable one-shot timer</p><p>　　– Programmable periodic timer</p><p>　　– User-enabled stalling when the controller asserts CPU Halt flag during debug</p><p>　　– ADC event trigger<

98、/p><p>　　■ 16-bit Input Capture modes</p><p>　　– Input edge count capture</p><p>　　270 September 04, 2010</p><p>　　Texas Instruments-Production Data</p><p>　　

99、General-Purpose Timers</p><p>　　– Input edge time capture</p><p>　　■ 16-bit PWM mode</p><p>　　– Simple PWM mode with software-programmable output inversion of the PWM signa</p>

100、;<p>　　Functional Description</p><p>　　The main components of each GPTM block are two free-running 16-bit up/down counters (referredto as TimerA and TimerB), two 16-bit match registers, two prescaler

101、match registers, and two 16-bitload/initialization registers and their associated control functions. The exact functionality of eachGPTM is controlled by software and configured through the register interface.Software co

102、nfigures the GPTM using the GPTM Configuration (GPTMCFG) register,the GPTM TimerA Mode (GPTMTAMR) register and the GPTM</p><p>　　After reset has been applied to the GPTM module, the module is in an inactive

103、state, and all controlregisters are cleared and in their default states. Counters TimerA and TimerB are initialized to0xFFFF, along with their corresponding load registers: the GPTM TimerA Interval Load(GPTMTAILR) regist